1. Field of the Invention
The present invention relates to a thin film transistor and method of manufacturing the same wherein, an inorganic layer planarized by an organic planarization layer is applied to reduce the number of masks necessary for forming a contact hole.
2. Discussion of the Related Art
Generally, among flat panel displays, an organic light-emitting display (OLED) has a bigger operating temperature range, superior shock resistance and vibration immunities, a faster response time, and a wider viewing angle, thus it is capable of providing a clearer moving picture. Consequently, the OLED is attracting attention as a next generation flat panel display.
An OLED generates light by electrons and holes combining to form electron-hole pairs in the semiconductor or carriers that may be exited to a higher energy level and drop to a ground level or stable state.
Depending on a driving method, OLEDs are either passive matrix (PM) or active matrix (AM) types. PMOLEDs have a separate driving source, and AMOLEDs utilize thin film transistors (TFT) as switching devices.
FIG. 1 is a cross-sectional view of a conventional AM organic electroluminescence (EL) display. In the method for manufacturing the organic EL display having the above structure, a TFT having a buffer layer (not shown), a semiconductor layer 11, source/drain areas 14-1, 14-2, a gate insulating layer 12, a gate electrode 13, an interlayer insulating layer 15, via holes 16-1, 16-2, and source/drain electrodes 17-1, 17-2 are formed on a substrate 10 by a set of semiconductor manufacturing processes.
Next, an inorganic layer 18-1, preferably, a silicon nitride layer, is deposited on the substrate 10 over the TFT as a passivation layer 18 to cover the source/drain electrodes 17-1, 17-2. After forming a photoresist pattern on the inorganic layer 18-1, a contact hole or a via hole 19-1, which exposes the source/drain electrode 17-2, is formed by an etching process using the photoresist pattern as a mask. The photoresist pattern is then removed by an oxygen plasma process, photoresist strip process, or other similar process.
Next, after forming a photosensitive type or etching type organic planarization layer 18-2 on the contact hole or via hole 19-1 and forming a photoresist pattern, another mask etching process is performed to the photoresist pattern, thereby forming the contact hole or via hole 19 in the organic planarization layer 18-2.
Next, after forming a conductive material on the entire surface of the substrate 10, a typical photolithography process is performed along with exposure, developing and etching processes, thereby forming the pixel electrode 20, which is coupled to the source/drain electrode 17-2 by the contact hole or via hole 19.
A planarization layer 21 is then formed on the entire surface of the substrate 10 to cover the pixel electrode 20, and an opening 22 is formed to expose the pixel electrode 20.
Finally, an AM organic EL display is manufactured by forming an organic layer (not shown) and an upper electrode (not shown) on the pixel electrode 20.
In this case, the contact hole or via hole 19 is formed by two etching processes using the inorganic layer 18-1 and the organic planarization layer 18-2. However, forming the contact hole or via hole 19 using two or more etching processes and at least two masks complicates the manufacturing process.
FIG. 2A, FIG. 2B, and FIG. 2C are scanning electron microscope (SEM) photographs showing a cross section of a TFT manufactured using the above process having the above structure.
FIG.2A shows an inorganic layer 18-1 deposited on one of the source/drain electrodes 17-1, 17-2, and an organic planarization layer 18-2 deposited thereon. FIG. 2B shows that the contact hole or the via hole 19 has a step caused by the inorganic layer 18-1 and the organic planarization layer 18-2. FIG. 2C shows that delamination (dark portion) and cracks may occur between the organic planarization layer 18-2 and the pixel electrode 20. Delamination may be caused by a poor adhesion between the organic planarization layer 18-2 and the pixel electrode 20, which may allow impurities and moisture to penetrate the device.